There is an intensive market pressure to provide a huge and dense memory system at as low cost per bit as possible. Thus, NAND storage systems are developed having assembled an increasing number of NAND memory cell arrangements. At the same time, the used memory cells may become multi-bit memory cells or multi-level memory cells. The use of these memories will require more elaboration power and bandwidth between memories and memory controllers.
In a conventional NAND memory system, one or a plurality of memory controllers are provided and are connected to NAND memory cells via one or more NAND buses.